A multiprocessor computing system is a computer assembled from a plurality of independently or semi-independently operating intelligent, i.e., processor-based, stations which are generally interconnected for communication by a communication bus. The system may also include other stations which are passive, i.e., which lack a processor to provide them with intelligence but which operate under the direction of, as extensions of, one or more of the intelligent stations. The stations are configured to practice a division of labor; that is, while they commonly are functionally diverse, with each station dedicated to the performance of predetermined functions, they cooperate in the performance of system tasks.
The objective of distributing the system intelligence among a plurality of stations is to improve the processing throughput of the computing system and to make the system versatile, flexible, to permit different systems adapted for different applications to be assembled from substantially the same repertoire of stations serving as building blocks of the system, and to allow the system to modularly and uniformly expand to meet increasing computing requirements.
While multiprocessor computing systems are known to the art, they have not achieved the full spectrum and ease of flexibility that it desirable, due to the complexities that such capability has been thought to introduce into both the system hardware design, and into the design of software capable of operating on such hardware and capable of taking advantage of the full range of features offered by such hardware. The software of such systems has been highly dependent upon the particular configuration and characteristics of the system hardware. Therefore a change in the system hardware or a change in the hardware configuration has required changes in the system software that reflect the hardware changes. Furthermore, the extension of uniprocessor capabilities and functional features to the multiprocessor system environment has greatly complicated the hardware needed to implement such features and capabilities in the system. Therefore, the multiprocessor computing systems of the prior art have sacrificed system flexibility and have imposed restrictions on system capabilities for the sake of achieving lesser complexity in system hardware.
The result has been that the prior art multiprocessor systems have been unduly restrictive in flexibility of operation and configuration which they support. Yet, at the same time, they have been relatively complex, especially in their software requirements. Because of those complexities and idiosyncrasies of the prior art multiprocessor systems, personnel such as system administrators and programmers who are highly trained in, and knowledgeable of, the protocols and internal structure of each system have been needed to maintain and configure the systems, resulting in high costs.
An example of such a prior art system as is described above is a multiprocessor system comprised of a plurality of processor stations interfaced for communication by a known bus which provides system configurational flexibility via a multimaster capability, that is, more than one intelligent station included in the system is allowed to initiate communications on the bus and to request action from other stations in the system. Such bus may be, for example, the UNIBUS.RTM. bus. The multiprocessor system limits direct access by one station of a second station of the system to an interface portion of the second station. Access by the first station's intelligence of the internals of the second station involves the intelligence of the second station in the completion of the communication, and requires the use of an additional layer of software communication protocol. All this makes the software of the multiprocessor system complex and makes station-to-station accesses visible to the software. Primarily because of the involvement of software in station-to-station accesses, expansion or reconfiguration of the system requires the services of a trained system administrator who is highly knowledgeable of all aspects of the operation and configuration of the systems so that he is capable of rearranging and modifying all affected system hardware and software in order to make the reconfigured system functional.